The present invention relates to an information processing device and the manufacturing method of the same, and particularly to an information processing device and the manufacturing method of the same suited to operate in a multi-programing or multi-CPU system.
In a multi-programming system, simultaneous access to shared resources (programs, data and input/output ports) between tasks may be limited. Therefore, when a specific processing (step) in a task is to be executed, whether or not this processing (task) is in competition with other tasks at that time is determined, and this fact is often used as an execution condition for the above-mentioned specific processing.
For example, suppose that task 1 and task 2 are running on a computer which performs a plurality of tasks in pseudo-parallel. Suppose that this computer has an input/output port to be exclusively accessed, and let a variable to be output to the port be X and a variable for storing the value read out from the port be Y.
In the prior art, when task 1 outputs a variable X and task 2 inputs a variable Y in such a configuration, the following program had to be made so that task 1 and task 2 did not access the input/output port P at the same time.
[Task 1]
1: if Sp=0 then Sp=1 else goto 1
2: Output variable X to the input/output port P
3: Sp=0
4: Next processing
[Task 2]
1: if Sp=0 then Sp=1 else goto 1
2: Input the value of the input/output port P to variable Y
3: Sp=0
4: Next processing
In the above, task 1 and task 2 are executed in pseudo-parallel. However, when each of the steps 1 to 4 is taken note of, they are executed consecutively. Sp is an auxiliary variable called a "semaphore" and the task which makes the "semaphore" "1" earliest can preferentially access the input/output port P. Therefore, if task 1 started slightly earlier than task 2, the access of the port P by task 1 is permitted, with the result that the access of the port P by the task 2 is delayed. In a system where the execution conditions for a certain processing are written as described above, the amount of coding increases and the incidence of bugs is high. Also, it is undesirable from the viewpoints of efficient use of memory and execution speed.
An example of a device that utilizes a conventional multi-CPU system is a lithography device for manufacturing semiconductors. The lithography device has various main controls, such as those for wafer handling, mask handling, and alignment lithography, the three main controls being shared by three respective CPUs. In the past, however, the processing of each main control was prescribed by one CPU and each corresponding program was written (compiled) for one CPU. For this reason, an effective matching of operations between multi-CPUs could not be achieved, lowering the overall control efficiency of the multi-CPUs at an actual operating time.